Method for maintaining low-overhead and non-coherent cache refresh mechanism with valid status monitoring on time period basis
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United States of America Patent
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Dec 26, 1995
Grant Date -
N/A
app pub date -
Sep 30, 1993
filing date -
Oct 1, 1992
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A cache memory refreshment mechanism employing ageing-out criteria to remove stale entries from the cache memory. Entries in the cache memory may have one of four states: 1) VALID, indicating that the entry may be used by the local processor; 2) DYING, indicating that the entry may be used, but that it has been in existence in the cache for a predetermined period of time; 3) REFRESH, following a dying status, indicating a) that the entry may still be used, b) that the entry has just been used while in the dying state, and c) that retrieval of data to update the entry and return it its valid state is being effected; and 4) IDLE, indicating that the entry has been aged out of the cache, and may not be used. The refresh status enables a cache entry may be updated independently of the processor using the cache, and thus the number of processor stalls resulting from data not being available in the cache after having been aged out is substantially reduced.
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