Task processing apparatus
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United States of America Patent
Stats
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Oct 31, 1995
Grant Date -
N/A
app pub date -
Mar 18, 1994
filing date -
Mar 19, 1993
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A task processing apparatus includes a main CPU, a plurality of sub-CPUs, a first starting section, a second starting section, and a notification section. The plurality of sub-CPUs independently execute a series of difference tasks set in advance in accordance with a predetermined sequence. The first starting section is arranged in the main CPU to output a first starting signal for starting the first sub-CPU, of the plurality of sub-CPUs, which executes a first task at the start of the series of tasks. The second starting section is arranged in each of the sub-CPUs except for the last sub-CPU. When the task in a given sub-CPU is completed, the second starting section outputs a second starting signal for starting the next sub-CPU which executes the next task. The notification section is arranged in the last sub-CPU of the plurality of sub-CPUs. The notification section supplies a processing completion signal indicating completion of the series of tasks to the main CPU when the last task is completed.

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- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
Patent Owner | Address | |
---|---|---|
TAMURA ELECTRIC WORKS LTD | MEGURO-KU TOKYO |
International Classification(s)

- [Classification Symbol]
- [Patents Count]
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Fukaya, Shinji | Tokyo, JP | 15 | 61 |
Kaya, Tomoki | Tokyo, JP | 2 | 7 |
Sasou, Hiroshi | Tokyo, JP | 8 | 127 |
Watanabe, Tosiaki | Tokyo, JP | 4 | 24 |
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Fee | Large entity fee | small entity fee | micro entity fee |
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Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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