ATM communication apparatus and failure detection and notification circuit

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United States of America Patent

PATENT NO 5461607
SERIAL NO

08251784

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Abstract

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In an ATM communication apparatus, the same failure detection process is conducted for the detection of a failure state of a VP when a transmission line of the apparatus fails and the detection of the failure state of the VP when a VP-AIS cell generated by another apparatus is received. When an AIS cell generation unit receives a channel failure signal generated by a line terminator, it generates an AIS cell and inserts it in a receiving cell stream. A circuit provided at downstream of the cell stream copies or extracts the AIS cells, determines the failure state, generates a FERF cell in accordance with the determination, and inserts it in a sending cell stream.

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Patent Owner(s)

Patent OwnerAddress
HITACHI LTD6 KANDA SURUGADAI 4-CHOME CHIYODA-KU TOKYO 101
TELEGRAPH AND TELEPHONE CORPORATION6 KANDA SURUGADAI 4-CHOME 1-6 UCHISAIWAICHO-1-CHOME CHIYODA-KU TOKYO JAPAN

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ito, Yutaka Yokohama, JP 228 6408
Miyagi, Morihito Tokyo, JP 23 577
Oka, Kenichi Yokohama, JP 8 50
Takagi, Yasushi Kunitachi, JP 46 634

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