System for combining data from multiple CPU write requests via buffers and using read-modify-write operation to write the combined data to the memory
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United States of America Patent
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Oct 17, 1995
Grant Date -
N/A
app pub date -
Jun 26, 1992
filing date -
Jun 26, 1992
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A write compression buffer is connected to a CPU bus and to a memory controller to provide write cycle compression in which plural partial write requests to the same memory address are compressed into a single memory write cycle. The buffer has a plurality of buffering level.
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