High current MOS transistor bridge structure
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United States of America Patent
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Sep 12, 1995
Issued Date -
N/A
app pub date -
Sep 21, 1994
filing date -
Nov 25, 1991
priority date (Note) -
Expired
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Abstract
A high current MOS transistor integrated bridge structure includes at least two arms, each having a first and a second MOS transistor. The structure is formed on an N++ substrate forming a positive potential output terminal, and an N-type epitaxial layer. For each first transistor, an L shaped region is formed of a horizontal N+ region which is connected to the surface through an N++ vertical region. Forming a corresponding alternating current input with this region is an N type region which has within it a succession of P type regions, and a pair of N+ type regions forming a negative potential output terminal. For each second transistor, an N+ region has N++ lateral regions extending to the surface, and includes an N type region containing a succession of P type regions and a pair of N+ regions forming corresponding alternating current inputs. The first transistor of each arm is entirely contained within a P type isolation region which has P+ regions extending to the surface of the substrate.
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