Method and structure for a fault-free input configuration control mechanism
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United States of America Patent
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Aug 29, 1995
Grant Date -
N/A
app pub date -
Nov 18, 1994
filing date -
Nov 18, 1994
priority date (Note) -
Expired
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Abstract
A unique configuration control mechanism is disclosed which provides a fault-free verification of digital hardware and software modules, as well as verification of the logic control circuits used to drive said modules.
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