Semiconductor integrated circuit operable and programmable at multiple voltage levels
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Aug 22, 1995
Grant Date -
N/A
app pub date -
Jun 4, 1992
filing date -
Jul 2, 1991
priority date (Note) -
Expired
status (Latency Note)
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Abstract
Each internal circuit of a semiconductor integrated circuit operates at both a relatively high operating voltage having a predetermined allowable range and a relatively low operating voltage also having a predetermined allowable range. The operating voltage is externally supplied. Operating conditions of the semiconductor integrated circuit are individually set restrictive to the relatively high operating voltage having a predetermined allowable range and to the relatively low operating voltage having a predetermined allowable range. The semiconductor integrated circuit is operable selectively at these operating voltages. Since the internal circuits are operated at two operating voltages, an arrangement of internal circuits can be simplified while the semiconductor integrated circuit is concurrently usable in not only the conventional system but also a low-voltage one. Moreover, an operating method of the sort that conforms to specifications restrictive of both the relatively high operating voltage as used in the conventional system and the low-voltage system renders a simply constructed integrated circuit with an extendable a range of uses.
First Claim
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Family

- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
Patent Owner | Address | |
---|---|---|
HITACHI LTD | TOKYO 100-8280 | |
HITACHI VLSI ENGINEERING CORP | KODAIRA-SHI TOKYO |
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Furuno, Takeshi | Gakuennishi, JP | 30 | 795 |
# of filed Patents : 30 Total Citations : 795 | |||
Matsuo, Akinori | Higashiyamato, JP | 26 | 429 |
# of filed Patents : 26 Total Citations : 429 | |||
Nakamura, Yasuhiro | Gakuennishi, JP | 180 | 2363 |
# of filed Patents : 180 Total Citations : 2363 |
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Patent Citation Ranking
- 13 Citation Count
- G11C Class
- 55.35 % this patent is cited more than
- 30 Age
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Maintenance Fees
Fee | Large entity fee | small entity fee | micro entity fee | due date |
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Fee | Large entity fee | small entity fee | micro entity fee |
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Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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