Monopulse processor
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United States of America Patent
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Mar 28, 1995
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N/A
app pub date -
May 28, 1981
filing date -
May 28, 1981
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Abstract
In a monopulse radar processor, the usual sum (s) and difference (d) signals are manipulated to produce two other signals (s+ad and s+bd, in which a and b are constants). The phase of each of these derived signals with respect to the sum signal is then determined. The real part of d/s and, if desired, the imaginary part of d/s are calculated from these measured phase angles. The real part of d/s is the conventional output from a monopulse processor.
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