ECL gate having active pull-down transistor
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United States of America Patent
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Jan 10, 1995
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N/A
app pub date -
May 3, 1993
filing date -
May 3, 1993
priority date (Note) -
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Abstract
The present invention relates to a modified emitter coupled logic circuit which includes a differential logic stage and an emitter-follower output stage. An active pull-down circuit and a constant voltage source are included in the output stage of this circuit to allow the output of the circuit to switch from a high level to a low level at approximately the same speed as the output can switch from a low level to a high level. A particular embodiment of the present invention provides a constant voltage source comprising an operational amplifier, a reference potential generating circuit and a constant voltage signal adjusting circuit.
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