Sample-and-hold circuit including push-pull transconductance amplifier and current mirrors for parallel feed-forward slew enhancement and error correction

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United States of America Patent

PATENT NO 5378938
SERIAL NO

08018856

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Abstract

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A transconductance push-pull amplifier (20) generates primary push-pull currents (I1, I2) corresponding to a voltage input signal (VIN). Current mirrors (42,44) generate secondary push-pull currents (I3, I4) corresponding to the primary push-pull currents (I1, I2). For sampling, both the primary and secondary push-pull currents (I1, I2, I3, I4) are applied to charge a capacitor (C3) in a current feed-forward arrangement with high slew rate and fast signal acquisition to produce a voltage output signal (VOUT). The capacitor (C3) is disconnected from the amplifier (20) and current mirrors (42,44) to hold the output signal (VOUT). Switching transistors (Q13, Q15) which are connected between the capacitor (C3) and the current mirrors (42,44) have substantially the same non-linear modulation characteristics as corresponding output transistors (Q7, Q8) in the amplifier (20). The output and switching transistors (Q7, Q8, Q13, Q15) are connected to modulate out-of-phase such that non-linear modulation of the primary push-pull currents (I1, I2) by the output transistors (Q7, Q8) is canceled by non-linear modulation of the secondary push-pull currents (I3, I4) by the switching transistors (Q13, Q15), and the output signal (VOUT) is a highly linear replica of the input signal (VIN).

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Patent Owner(s)

Patent OwnerAddress
YAKISAMI CAPITAL CO L L C2711 CENTERVILLE RD SUITE 400 WILMINGTON DE 19808

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Birdsall, Dwight D Norwalk, CA 7 97
Elliott, Phillip L Fort Collins, CO 4 58
Linder, Lloyd F Agora Hills, CA 61 883

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