Process of fabricating floating gate type field effect transistor having drain region gently varied in impurity profile
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United States of America Patent
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Nov 22, 1994
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N/A
app pub date -
Aug 16, 1993
filing date -
Aug 28, 1992
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Abstract
In a process of fabricating a floating gate type field effect transistor, an ion implantation for forming a drain region is repeated more than twice at different angles, and the drain region has an impurity profile gently changed by virtue of the ion implantation at the different angles so that a drain disturbe is effectively suppressed, thereby improving the stability of the data bit stored in the floating gate type field effect transistor.
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