Clock selection control device

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United States of America Patent

PATENT NO 5357491
SERIAL NO

08189037

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Abstract

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A clock stoppage detector and a selector selection determining circuit are provided on each of a plurality of circuit boards. If any abnormality is detected in the clock selected in accordance with selector control information supplied from a clock selection controller provided common to the plurality of circuit boards, the selector selection determining circuit changes the selection independently of the selection control information. The selector selection determining circuit also performs clock selection independently when failure occurs to the clock selection controller.

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Patent Owner(s)

Patent OwnerAddress
FUJITSU LIMITED1-1 KAMIKODANAKA 4-CHOME NAKAHARA-KU KAWASAKI-SHI KANAGAWA 211-8588

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Yamasaki, Hiroshi Kawasaki, JP 81 746

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