BPSK demodulator using compound phase-locked loop
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United States of America Patent
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Sep 13, 1994
Grant Date -
N/A
app pub date -
Jul 20, 1993
filing date -
Jul 31, 1992
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A BPSK demodulator having a compound phase locked loop, such as a Costas loop, is disclosed. An in-phase component, signal SI from a Costas loop demodulating section 10 is converted by a symmetrical binary-valued signal forming converting circuit 21 into binary-valued signals, while a quadrature signal component SQ from the demodulating section 10 is also converted by a non-symmetrical binary-valued signal forming converting circuit 22 into binary-valued signals. The outputs of the circuits 21, 22 are supplied to a flip-flop 23 as its data input and its clock input, respectively. An output of flip-flop 23 is integrated by an integrating circuit 25. A CPU 28 decides whether or not an integrated value from integrating circuit 25 exceeds a predetermined threshold value TH to decide whether or not the Costas loop demodulating section 10 is in the locked state. In this manner, the locked state can be detected by a simplified constitution, while a pseudo-locked state may also be detected.
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