Method of making a shallow junction by using first and second SOG layers

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United States of America Patent

PATENT NO 5340770
SERIAL NO

07965822

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Abstract

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A shallow junction spin on glass (SOG) process which provides shallow junction semiconductor devices without defects and leaky junctions. The process includes spinning first and second SOG layers containing first and second dopants onto a semiconductor substrate and diffusing the dopants into the substrate to form first and second junctions. The diffusion time and temperature are controlled so as to produce junctions having depths less than a predetermined maximum depth. Insulating and metal interconnect layers are deposited on top of the SOG layers. The insulating layer may include boron-phosphorus silicon glass (BPSG).

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Patent Owner(s)

  • MAGNACHIP SEMICONDUCTOR, LTD.;NCR CORPORATION;SYMBIOS LOGIC INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Allman, Derryl D J Colorado Springs, CO 74 1927
Kwong, Dim-Lee Austin, TX 28 1062

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