Protective circuit for protecting contacts of monolithic integrated circuits by preventing parasitic latch up with other integrated circuit elements

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United States of America Patent

PATENT NO 5326994
SERIAL NO

07955765

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A protective circuit for connecting contacts of monolithic integrated circuits, particularly CMOS input/output stages. The protective circuit has a four-layer device (ta, ts) with a defined switching threshold in the area of each connecting contact (A) and a low-resistivity current path (sa) from the connecting contact (A) to a supply terminal (VSS, VDD). The protective circuit also contains devices (zw2, z5) which prevent or provide a bypass for any undesired flow of current (i3, i4) between at least parts of the four-layer device and triggerable circuit regions (W2).

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Patent Owner(s)

Patent OwnerAddress
DEUTSCHE ITT INDUSTRIES GMBHPOSTFACH 840 HANS-BUNTE-STRASSE 19 FREIBURG 79108

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Gehrig, Wilfried W March, DE 4 36
Giebel, Burkhard Denzlingen, DE 21 284

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  • 17 Citation Count
  • H01L Class
  • 45.48 % this patent is cited more than
  • 31 Age
Citation count rangeNumber of patents cited in rangeNumber of patents cited in various citation count ranges133842351204041185611901 - 1011 - 2021 - 3031 - 4041 - 5051 - 6061 - 7071 - 8081 - 9091 - 100100 +0255075100125150175200225250275300325350375400425

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