High performance integrated circuit chip package

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United States of America Patent

PATENT NO 5325265
SERIAL NO

07819571

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Abstract

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A high performance integrated circuit chip package includes a support substrate having conductors extending from one face to the opposite face thereof and a multilayer wiring substrate on the opposite face of the support substrate for connecting chips mounted thereon to one another and to the conductors. A heat sink includes microchannels at one face thereof, with thermally conductive cushions connecting the one face of the heat sink with the exposed back sides of the chips, to provide a high density chip package with high heat dissipation. The support substrate and heat sink may be formed of blocks of material having thermal expansion matching silicon. The cushions are a low melting point solder, preferably pure indium, and are sufficiently thick to absorb thermal stresses, but sufficiently thin to efficiently conduct heat from the chips to the heat sink.

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Patent Owner(s)

Patent OwnerAddress
MCNCRESEARCH TRIANGLE PARK NORTH CAROLINA 27709

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Darveaux, Robert F Raleigh, NC 28 1221
Dishon, Giora Jerusalem, IL 13 392
Hwang, Lih-Tyng Durham, NC 13 361
Jacobs, Scott L Apex, NC 12 1356
Nayak, Deepak Los Angeles, CA 40 1067
Poley, Neil M Cary, NC 4 215
Reisman, Arnold Raleigh, NC 27 1112
Turlik, Iwona Raleigh, NC 26 1743

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