Method and apparatus for implementing post-modulation error correction coding scheme
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United States of America Patent
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May 10, 1994
Grant Date -
N/A
app pub date -
Jan 12, 1990
filing date -
Jan 12, 1990
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A method of and apparatus for providing error correction coding for a block of user data in which the user data is initially modulated by a first modulator and then the modulated user data is error correction encoded to produce a first plurality of check bits. The first plurality of check bits are then modulated by a second modulator whose output is then fed to a second error correction encoder which produces a second plurality of check bits. The modulated user data, the first plurality of check bits and the second plurality of check bits are all fed to a shift register where the error correction encoded user data block is formed, useful with magnetic and optical storage devices.
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Patent Citation Ranking
- 18 Citation Count
- H03M Class
- 0 % this patent is cited more than
- 31 Age