Method of manufacturing a static induction field-effect transistor
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United States of America Patent
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Mar 22, 1994
Grant Date -
N/A
app pub date -
Oct 23, 1992
filing date -
Jan 31, 1990
priority date (Note) -
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Abstract
A semiconductor device comprises a vertical MIS-SIT which has a smaller source-to-drain distance for operation at ultra-high speed. The semiconductor device has a substrate crystal for epitaxial growth thereon, least two semiconductor regions of different conductivity types deposited by way of epitaxial growth on the substrate crystal according to either metal organic chemical vapor deposition (MO-CVD) or molecular layer epitaxy (MLE), thereby providing a source-drain structure, a gate side formed by etching the semiconductor regions of the source-drain structure, the gate side comprising either a (111)A face or a (111)B face, and a semiconductor region deposited as a gate by way of epitaxial growth on the gate side according to either MO-CVD or MLE.
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