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Abstract

An apparatus 1 for testing mixed signal electronic devices (i.e., devices, such as LSI devices, whose input/output signals include direct current signals, digital signals and analog signals, where the time relationship between the various input and output signals may be either synchronous or asynchronous) includes a master clock subsystem (MCLK-SS) 11, a subsystem group comprised of a digital master subsystem (DM-SS) 12, a digital slave subsystem (DS-SS) 13, a waveform generator subsystem (WG-SS) 14, a waveform digitizer subsystem (WD-SS) 15, a time measuring module (TMM) 16, and a direct current subsystem (DC-SS) 17, and an interfacing test head 18. The MCLK-SS 11 receives a master clock from a timing generator 21 or DSP 23 of the device under test (DUT) 186 and generates a first master clock MCLK1 and a second master clock MCLK2, each of which is synchronized with the master clock from the DUT. A reference clock generator 111, which receives the output of the buffer 181, supplies a standard clock to the first and second clock generators 112, 113, which in turn generate the first and second master clock signals.

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First Claim