Monitor circuit for detecting noise conditions through input output coincidence comparison

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United States of America Patent

PATENT NO 5263170
SERIAL NO

07532169

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Abstract

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A monitor circuit is provided, which includes a data storage unit having dummy data stored therein, a buffer circuit connected to the output of the data storage unit, a coincidence circuit for comparing the data on the I/O bus connected between the buffer circuit and I/O units with the dummy data of the data storage unit, and a flag circuit for setting an abnormal flag responsive to the non-coincidence output from the coincidence circuit. During the I/O refresh of a PC, such an abnormal flag is set in response to a disturbance of the I/O bus. The I/O refresh is repeatedly performed in the event the flag is set.

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Patent Owner(s)

Patent OwnerAddress
OMRON TATEISI ELECTRONICS COKYOTO JAPAN KYOTO-SHI KYOTO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kato, Yukio Sunto, JP 88 838

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