Charge amplifier circuit
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United States of America Patent
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Oct 12, 1993
Grant Date -
N/A
app pub date -
Mar 19, 1992
filing date -
Apr 2, 1991
priority date (Note) -
Expired
status (Latency Note)
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Abstract
The invention relates to a charge amplifier circuit with a control loop for resetting, which for minimizing the leakage currents that falsify the measuring results includes two diodes (D.sub.1) and (D.sub.2), connected antiparallel in the loop and constituting input protection diodes of an integrated circuit (ISK). In the operating (measuring) phase the diode resistance (R.sub.D) is extremely high and the voltage drop over the diode pair is small, so that no significant leakage current gets through onto the charge amplifier input IN.sub.Q. In the reset phase the diode resistance (R.sub.Dr) is practically nil.
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