Interface bus with independent data, command and direct control sections for parallel transfer of information between host and intelligent storage
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United States of America Patent
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Aug 10, 1993
Grant Date -
N/A
app pub date -
May 11, 1989
filing date -
May 11, 1989
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A data processing system is disclosed in which a plurality of high performance, intelligent, mass storage input-output devices are linked to a host controller by an input-output interface bus which is divided into three sections. Each section is completely independent of the other two sections and used for a different and specific purpose. One section is used to transfer commands and retrieve status information. A second section is used to handle device requests for data transfer and device signals for operation complete. The third section is used to transfer data to and from a device. Since the three sections are completely independent, simultaneous transfer of command control and data to different input-output devices or to a single input-output device can be performed.
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