Low power pseudo-static ROM
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United States of America Patent
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Jul 6, 1993
Grant Date -
N/A
app pub date -
Dec 24, 1990
filing date -
Dec 24, 1990
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A pseudo-static ROM circuit which uses cross-coupled sense amplifiers to provide rapid accesses to ROM stored data, yet because of a special bit line precharger and dummy load arrangement dissipates very little static power. After a stable logic static is attained by the sense amplifier during a READ, the sense amplifier and the precharger-dummy load circuits do not draw any appreciable current or power until the next precharge-and-READ operation is initiated. Therefore, almost all of the power dissipated by the pseudo-static ROM occurs during the dynamic operations of precharging and READing the bit lines.
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