Digital switching signal in stereo decoders and circuit array for generation thereof
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United States of America Patent
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Jun 15, 1993
Grant Date -
N/A
app pub date -
Dec 12, 1991
filing date -
Dec 24, 1990
priority date (Note) -
Expired
status (Latency Note)
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Abstract
In stereo receivers with digital decoding pulse generation, interference by the harmonics of the digital switching signal with signals in adjacent channels or with carrier signals in the sideband lead to faults that can be perceived in the audible range as chirping. An integrated stereo decoder with digital decoding pulse generation is described in which the low-harmonic, step-like switching signal consecutively assumes within a period and relative to the amplitude the values (1+.sqroot.2).sup.-1, 1, (1+.sqroot.2).sup.-1, -(1+.sqroot.2).sup.-1, -1, -(1+.sqroot.2).sup.-1, with the .+-.(1+.sqroot.2).sup.-1 values each persisting for an eighth of the period and the .+-.1 values a quarter of the period. Furthermore, an integrated circuit array for generation of this low-harmonic oscillation is described. The circuit array comprises a two-stage dual frequency divider stage and a differential amplifier, where a rectangular signal is supplied to the differential amplifier input and the current is modulated by the differential amplifier by using a second rectangular signal with double the frequency. The low-harmonic switching signal can be picked up at the output of the differential amplifier.
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