Importance

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Abstract

The first current flowing terminal of a first MOS transistor is coupled to the first current flowing terminal of a second MOS transistor at a first voltage node; the first current flowing terminal of the third MOS transistor is coupled to a second current flowing terminal of the first MOS transistor at a first output node; the first current flowing terminal of a fourth MOS transistor is coupled to the second current flowing terminal of the second MOS transistor at a second output node; and the second current flowing terminal of the fourth MOS transistor is coupled to the second current flowing terminal of the third MOS transistor at a second voltage node. A transistor control unit is coupled to the gate terminals of the first, second, third and fourth MOS transistors for biasing the transistors for alternately flowing current through the first and fourth MOS transistors or through the second and third MOS transistors. The first output node is coupled to a first input terminal of an ECL circuit and a second transmission line is coupled to the second output node is coupled to a second input terminal of the ECL circuit. A source resistance is coupled between the first voltage node and a voltage source. The source resistance ensures that the voltage at the first and second output nodes do not exceed the saturation values of the driven ECL gates while simultaneously maintaining a strong differential signal across the first and second output nodes.

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First Claim