Method for isolating SiO.sub.2 layers from PZT, PLZT, and platinum layers
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United States of America Patent
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May 18, 1993
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N/A
app pub date -
Mar 3, 1992
filing date -
Mar 3, 1992
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Abstract
An improved method for constructing integrated circuit structures in which a buffer SiO.sub.2 layer is used to separate various components comprising ferroelectric materials or platinum is disclosed. The invention prevents interactions between the SiO.sub.2 buffer layer and the ferroelectric materials. The invention also prevents the cracking in the SiO.sub.2 which is commonly observed when the SiO.sub.2 layer is deposited directly over a platinum region on the surface of the circuit. The present invention utilizes a buffer layer of material which is substantially inert with respect to the ferroelectric material and which is also an electrical insulator to separate the SiO.sub.2 layer from the ferroelectric material and/or the platinum regions.
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