Frequency divider which has a variable length first cycle by changing a division ratio after the first cycle and a frequency synthesizer using same
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Apr 13, 1993
Grant Date -
N/A
app pub date -
Dec 23, 1987
filing date -
Dec 23, 1986
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A frequency division scheme which offsets for a phase lag produced on initial power-on is described. A division ratio of a programmable counter is initially set at a first division ratio at the time of releasing the programmable counter from its reset state. When the first division cycle is complete, the division ratio is reset to its steady state value. Thus, a delay equivalent to the phase lag is produced. A frequency synthesizer is also proposed where the division ratio is set, and a phase difference is detected. Reset signals are continually set while the phase difference is changed. This cycle is continued until the phase difference is reduced to one cycle of the input signals or less.
First Claim
Family
International Classification(s)
- [Classification Symbol]
- [Patents Count]
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully