High frequency master/slave flip-flops
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Apr 6, 1993
Issued Date -
N/A
app pub date -
Nov 21, 1990
filing date -
Nov 30, 1987
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A D-type, master/slave, flip-flop is described for use as a divide-by-2 frequency divider in which a frequency to be divided is input as a clock signal and the Q output is connected to the D input, and in which the master section and the slave section consist only of tracking means, latching being effected by using potentials established on tracking transistors of each section during the previous clock pulse.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully