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Abstract

An image is stored in raster format having N raster or data lines each with M pixel values in an image or print buffer memory (10). An addressing circuit (20) addresses the print buffer memory to read out m.times.n bit columns or blocks of data, where n=N unless cropping of the image is desired. The blocks are parallel loaded alternately into a first FIFO memory array (40) and a second FIFO memory array (62). Each FIFO memory array includes a plurality of FIFO memories (42a-p 64a-p) which store n data lines segments each of m/p bits. In the first n clock cycles of the first FIFO memory (42a), a multiplexer (46) passes the least significant bit (50) of each data line segment read out of the first FIFO memory. The next N times that the first FIFO memory is clocked, the multiplexer passes the next least significant bit and so on until all m/p bits have been passed serially to a laser printer (48). Thereafter, this process is repeated for a second FIFO memory (42b) and each successive one of the p FIFO memories of the first array. After the data in the first array has been serialized, the data in the second FIFO array (62) is serialized as another m.times.n bit column of data is loaded into the first FIFO memory array (40). In this manner, data is serialized and passed to the laser printer (48) in an order which causes data from a horizontal raster line image to be printer along orthogonal data columns (54, 56) on the fly.

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First Claim