Digital oscillator for generating a signal of controllable frequency
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United States of America Patent
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Mar 16, 1993
Grant Date -
N/A
app pub date -
Jan 11, 1991
filing date -
Jan 20, 1990
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A digital oscillator is built around an accumulator which is incremented by a predetermined number N of unit values at every pulse of a sequence of pulses of a reference frequency and the carry output of the accumulator is used to produce the output frequency. In order to eliminate the jitter of that output, the carry signal is supplied to a delay chain, from the output of which a delay is selected in a manner dependent upon the content of the accumulator during the presence of the carry signal in question at the output of the accumulator. The carry pulse times a D register in which the contemporary content of the accumulator is stored until the next carry pulse while being supplied to a calculation circuit for selecting the appropriate delay derived from the D register content and the number of units of accumulator incrementation in use at the particular time. It is possible to use a simple limiter for the calculation where the range of the increment magnitude is small and it is possible to extend the range of output frequency to harmonics by providing an AND correlation of the reference pulses and the carry pulse ahead of the input to the delay chain.
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