MIS-FET with small chip area and high strength against static electricity
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United States of America Patent
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Nov 3, 1992
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N/A
app pub date -
Dec 20, 1988
filing date -
Jan 21, 1988
priority date (Note) -
Expired
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Abstract
A metal insulated semiconductor field effect transistor (MIS-FET) includes a substrate, a semiconductor layer, and an oxide film on the semiconductor layer. Source and drain regions are formed by doping the semiconductor layer with impurities. A gate electrode is formed on the oxide film between the source and drain regions. An electrode is provided on the opposite side of the drain region from the gate electrode without contacting the gate electrode. The electrode is connected to either the source region or the substrate. Thus, a high strength against static electricity is performed without using a large area on the chip.
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