Ohmic contact for III-V semiconductor devices

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United States of America Patent

PATENT NO 5144410
SERIAL NO

07702151

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A dependable ohmic contact with consistently low specific contact resistance (<1.times.10.sup.-6 .OMEGA.-cm.sup.2) to n-type GaAs (10) is produced by a three or four step procedure. The procedure, which is employed following implantation to form doped regions in the GaAs substrate for contacting thereto, comprises: (a) adsorbing or reacting sulfur or a sulfur-containing compound (26) with the GaAs surface (10') at locations where the contact metal (28) is to be deposited; (b) forming a metal contact layer (28) on the treated portions of the GaAs surface; (c) optionally forming a protective layer (30) over the metal contact; and (d) heating the assembly (metal and substrate) to form the final ohmic contact. The surface treatment provides a lower specific contact resistance of the ohmic contact. Elimination of gold in the ohmic contact further improves the contact, since intermetallic compounds formed between gold and aluminum interconnects ('purple plague') are avoided. In addition, the absence of gold in the metal improves the reliability of ohmic contacts, and the resulting metal can be patterned by etching or lift-off process.

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Patent Owner(s)

Patent OwnerAddress
VITESSE SEMICONDUCTOR CORPORATION741 CALLE PLANO CAMARILLO CA 93010

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Johnson, David A Camarillo, CA 252 4236

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