Batch assembly of high density hermetic packages for power semiconductor chips
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United States of America Patent
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Aug 18, 1992
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N/A
app pub date -
Feb 28, 1991
filing date -
Feb 28, 1991
priority date (Note) -
Expired
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Abstract
Batch assembly methods for high density packaging of power semiconductor chips in hermetic thin packagings includes providing silicon chip arrays with thermocompressively bonded foil contacts, preparing ceramic lid arrays which contain upper surface and lower margin direct-bonded copper coverings and through-the-lid high current spherical conductors, coining Cu/Mo/Cu or copper cup arrays, die mounting within each respective cup a respective semiconductor chip, superpositionally registering a lid array with a strip form of cup array, and solder reflowing to hermetically seal all hermetic thin packagings within a registered set of cup and lid arrays.
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