Lead connections means for stacked tab packaged IC chips

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United States of America Patent

PATENT NO 5138438
SERIAL NO

07796873

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Abstract

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In the present invention, memory chips are stuck together in stacked fashion by TAB (tape automated bonding), and a multiple memory chip and lead complex like an SOP (small out-line package) is formed of the chips and leads, whereby a memory module of high packaging density can be realized by a flat packaging technique.

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Patent Owner(s)

Patent OwnerAddress
AKITA ELECTRONICS CO LTDMINAMIAKITA-GUN AKITA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Masayuki, Watanabe Yokohama, JP 7 495
Seiichiro, Tsukui Komoro, JP 7 495
Takashi, Ono Akita, JP 10 527
Toshio, Sugano Kokubunji, JP 10 557
Yoshiaki, Wakashima Kawasaki, JP 8 550

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