Interleaving method and apparatus
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United States of America Patent
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Aug 4, 1992
Grant Date -
N/A
app pub date -
Nov 14, 1989
filing date -
Jul 31, 1987
priority date (Note) -
Expired
status (Latency Note)
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Abstract
An interleaving method and apparatus suitable for burst error correction occurring in data transmission or reading of recording medium. In the interleaving method in which data to be transmitted is once written in a storing means and then read to be output in order different from a writing order, a plurality of counters for dividingly generating addresses of the storing means is used; and an operational relationship between the counters is changed between writing and reading of the storing means. ROMs for address translation can be omitted so that the number of gates is reduced very much. Thus, a reasonable interleaving apparatus suitable for LSI formation can be realized. In addition, since ROMs for address translation interposed between the counter and the storing means in the conventional apparatus are omitted, access time for the storing means can be shortened substantially.
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