Digital push-pull driver circuit
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United States of America Patent
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-
Jun 30, 1992
Issued Date -
N/A
app pub date -
Jan 16, 1990
filing date -
Mar 16, 1987
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A digital push-pull driver circuit comprising two output transistors which are alternatingly controlled into the conducting state by a data control circuit and to whose common connection point a load to be driven is connected. One slope steepness reducing, enable-dependent delay circuit each is connected between the control electrode of each of the two output transistors and the data control circuit. The output of each delay circuit is connected to an enable input of the respective other delay circuit. The delay times of the two delay members are at least as long as the width of the steepness-reduced pulse slopes in terms of time.
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