Microprogram controlled microprocessor having a selectively expandable instruction code length including independent description of operand addressing and a type of operation for an operand by single instruction in a common coding scheme
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United States of America Patent
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May 26, 1992
Grant Date -
N/A
app pub date -
Nov 1, 1988
filing date -
Nov 4, 1987
priority date (Note) -
Expired
status (Latency Note)
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Abstract
In a microprocessor, a minimum instruction code length is set to a predetermined number of bits (e.g. one byte) length. One feature of the invention is that an instruction set which can selectively expand the instruction code length at a unit of the predetermined number of bits is used. Another feature is that an operand addressing mode and a type of operation for an operand are designated by separate predetermined number of code bits which are coded in a common coding scheme so that an instruction decoder is shared by those codes.
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