Method of making a sub-micron NMOS, PMOS and CMOS devices with methods for forming sub-micron contacts
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United States of America Patent
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May 19, 1992
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N/A
app pub date -
May 30, 1990
filing date -
Jul 15, 1987
priority date (Note) -
Expired
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Abstract
The sub-micron NMOS, PMOS and CMOS devices with methods for forming sub-micron contacts provide sub-micron devices and processes for manufacturing them with contacts down to 0.1 microns or less. All processes and devices utilize doped polysilicon as the electrodes for the device elements, and the preferred embodiment surrounds the polysilicon contacts with low temperature oxide covered by SOG which avoids all oxidation steps that could be detrimental in this contact size range. An optional alternative includes large contact area enlarging layers of silicide directly beneath each contact.
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