MOS transistor with a charge induced drain extension
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United States of America Patent
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Apr 28, 1992
Issued Date -
N/A
app pub date -
Dec 15, 1989
filing date -
Dec 22, 1987
priority date (Note) -
Expired
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Abstract
A process is taught which provides very shallow conductive regions in a semiconductor material by the formation of a fixed charge placed in an overlying dielectric layer which induces an inversion region in the underlying semiconductor. The inversion region so formed is used as a MOSFET drain extension between a drain contact region and the channel located beneath the gate region. The conductivity of the induced inversion region is controlled by the concentration of the ionic charge present in the dielectric layer.
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