Semiconductor device having multilayered wiring structure with a small parasitic capacitance
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United States of America Patent
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Apr 7, 1992
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app pub date -
Mar 27, 1991
filing date -
Mar 15, 1988
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Abstract
The semiconductor device of the present invention includes a semiconductor substrate on which are formed semiconductor elements, and a plurality of wiring layers formed on the semiconductor substrate via porous insulating films. The surface of the plurality of the wiring layers is preferably covered with a compact insulating film. The size of the pores in the porous insulating film is preferably 5 nm to 50 nm in diameter, and the volume of the pores in the porous insulating film is preferably 50% to 80% of the total volume of the porous insulating film. The porous insulating film is formed by subjecting a mixed insulating film of a basic oxide and an acidic oxide to a heat treatment to precipitate only either one of the basic oxide and the acidic oxide, and then dissolving out selectively the basic or acidic oxide precipitated.
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