Technique for jointly performing bit synchronization and error detection in a TDM/TDMA system

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United States of America Patent

PATENT NO 5084891
SERIAL NO

07404946

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A technique for bit synchronization and error detection of received digital data bursts in a TDM/TDMA system, such as that which will be used with low power portable digital telephony. A cyclically redundant codeword, e.g. a (161,147) codeword, is formed for transmission, using e.g. either a TDM packet or TDMA burst. The first and last bits in the codeword are then inverted to form a first set of marker bits. At a receiver, a second set of marker bits is inserted into a received word, again through inverting the first and last bits. The resulting marked word is then rotated by a pre-determined number of bits to place potentially erroneous bits at the end of this word. A multi-bit timing syndrome value is then determined and is used to access a look-up table for a value of bit slippage. The received word is advanced or retarded as specified by the bit slippage value to yield an intermediate word. The marker bits are removed from the intermediate word to yield an unmarked word for which an error syndrome value is determined. If the error syndrome value is zero, then the unmarked word is a synchronized substantially error-free codeword. If the unmarked word contains excessive bit slippage or bit errors indicated by an excessive value of the timing syndrome or a non-zero valued error syndrome, an indication is provided to ignore this word.

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Patent Owner(s)

Patent OwnerAddress
TTI INVENTIONS B LLC2711 CENTERVILLE ROAD SUITE 400 WILMINGTON DE 19808

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ariyavisitakul, Sirikiat Eatontown, NJ 34 1139
Chang, Li F Marlboro, NJ 2 243
Sollenberger, Nelson R Tinton Falls, NJ 74 2067

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