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Abstract

A direct digital frequency synthesizer generates an analog waveform of a predetermined frequency from accumulated digital frequency words which, as accumulated, represent the phase of a sine wave of the predetermined frequency. The synthesizer includes a phase accumulator, a 4-bit non-linear digital-to-analog converter (DAC) and a sample and hold circuit. The phase accumulator includes a 4-bit coarse-component accumulator for accumulating coarse phase components of the digital frequency words and a fine-component accumulator for accumulating fine phase components of the digital frequency words. The phase accumulator increments the coarse-component accumulator in response to the accumulated fine phase components exceeding a predetermined value. The 4-bit non-linear DAC converts the four bits accumulated in the coarse-component accumulator into an analog waveform of the predetermined frequency. The phase accumulator suppresses the generation of spurious frequency components in the analog waveform by randomly dithering the rate at which the coarse component accumulator is incremented by the phase accumulator. The sample and hold circuit is coupled to the output of the nonlinear DAC for mitigating any glitch errors induced in the nonlinear DAC by sampling the analog waveform at such times as when glitch-induced errors are not present.

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