Digitally controlled timing recovery loop
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United States of America Patent
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Nov 26, 1991
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N/A
app pub date -
Nov 13, 1990
filing date -
Nov 13, 1990
priority date (Note) -
Expired
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Abstract
A digitally controlled timing recovery loop is comprised of a digitally controlled Phase Locked Loop (PLL) consisting of a phase detector, loop filter, and voltage controlled oscillator (VCO). The phase detector is a multi-point sampling phase comparator. The loop filter is comprised of a data independent smoothing filter and a command sequencer. The VCO is a digitally controlled ring oscillator with clock phase selection. The timing recovery loop tolerates a relatively large amount of incoming jitter and minimizes data dependent, ISI-induced, intrinsic jitter.
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