Precharged logic systems with protection against current leakage
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Sep 24, 1991
Grant Date -
N/A
app pub date -
Jul 31, 1990
filing date -
Jul 31, 1990
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
In a CMOS logic circuit an output node is controlled by a plurality of transistors of a first type and precharged by a precharging transistor of a second type. Clock pulses of alternate first and second levels are supplied to the precharging transistor. The first level switches the precharging transistor on to precharge the output node while the second level substantially switches off the precharging transistor but not completely so as to leave a small current flow through the precharging transistor.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully