Addressing multiple types of memory devices
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United States of America Patent
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Aug 13, 1991
Issued Date -
N/A
app pub date -
Feb 1, 1990
filing date -
Oct 23, 1987
priority date (Note) -
Expired
status (Latency Note)
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Abstract
The present invention provides a memory addressing system that can accommodate multiple size DRAMS. DRAMS of various sizes can be mixed in a variety of ways. The present invention provides a hardware register associated with each pair of banks of DRAMS. This hardware register is programmable to indicate the type of DRAMS that have been inserted in the particular memory banks and to indicate the starting address of the particular set of memory banks. Using this technique, it is necessary to insert the largest memory chips in the first memory bank. Memory chips of either size can be inserted in either set of memory banks and the information in the programmable register is used to control circuitry which appropriately modifies the accessing signals which are sent to the memory system.
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