Process for preventing a native oxide from forming on the surface of a semiconductor material and integrated circuit capacitors produced thereby

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United States of America Patent

PATENT NO 5032545
SERIAL NO

07605748

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Abstract

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A process for forming silicon nitride layers on silicon substrates which includes initially heating the silicon substrates in a rapid thermal processor and in a substantially oxygen-free and residual moisture free environment to form a thin Si.sub.3 N.sub.4 layer directly on the silicon surface which is free of any measurable native SiO.sub.2 thereon. Then, the nitridized wafers are transferred into a conventional nitride furnace where the thin Si.sub.3 N.sub.4 layers may be increased in thickness by a desired amount. Typically, the initial or first Si.sub.3 N.sub.4 layer thickness will be about 10-30 angstroms and the second Si.sub.3 N.sub.4 layer will be on the order of 80 angstroms or more to form a composite Si.sub.3 N.sub.4 layer of about 100-150 angstroms in total thickness. This novel process and the high dielectric constant integrated circuit capacitors produced thereby are highly useful in the manufacture of certain very large scale integrated circuit (VLSI) components such as dynamic random access memories and the like.

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Patent Owner(s)

Patent OwnerAddress
MICRON SEMICONDUCTOR INCPATENT DEPARTMENT MS 507 2805 E COLUMBIA ROAD BOISE ID 83706

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Doan, Trung T Boise, ID 253 14083
Lowrey, Tyler A Boise, ID 212 12372

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