Communication link interface with different clock rate tolerance
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United States of America Patent
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May 28, 1991
Issued Date -
N/A
app pub date -
Sep 19, 1989
filing date -
Sep 30, 1988
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A communication link interface having an assembly register which is loaded in response to a transmitter's clock rate and unloaded in response to a receiver's clock connected to the interface. The assembly register holds a series of data words received from the communication link. Logic gates or flip flops are provided to insure a time delay between loading the assembly register and unloading it.
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