Method for the manufacturing of insulated gate field effect transistors (IGFETS) having a high response speed in high density integrated circuits

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United States of America Patent

PATENT NO 4965219
SERIAL NO

07470445

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Abstract

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The method involves the formation above the substrate of regions of epitaxial type automatically aligned with the gate electrode and designed to form the source and drain regions of the transistor. These regions are doped by ion implantation using a comparatively low implantation energy such that the doping agent does not penetrate into the substrate. By providing the source and drain junctions on the surface of the substrate, rather than in the substrate, there are no lateral junction capacitances and the horizontal dimensions of the IGFET may be reduced, with the result that high response speeds and high integration densities are obtained.

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Patent Owner(s)

Patent OwnerAddress
SGS MICROELETTRONICA SPANot Provided

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cerofolini, Gianfranco Milan, IT 24 250

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