Timing synchronizing circuit for baseband data signals
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United States of America Patent
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-
Oct 16, 1990
Grant Date -
N/A
app pub date -
Oct 4, 1988
filing date -
Oct 4, 1988
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A timing synchronizing circuit with a phase locked loop. A multiplexor is employed to cause the phase locked loop to alternate between a self-excited mode for maintaining the frequency of a recovered timing signal and a mode in which state transitions of a baseband data signal are compared with the phase locked loop feedback signal to adjust the frequency of the recovered timing signal.
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