Minimal connectivity parallel data processing system
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United States of America Patent
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Oct 16, 1990
Issued Date -
N/A
app pub date -
Nov 14, 1988
filing date -
Mar 27, 1987
priority date (Note) -
Expired
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Abstract
A parallel data processing system comprises a control data processor and a plurality of processing planes, each of the planes comprising a plurality of data processing cells. Each of the cells within a plane is communicatively coupled to adjacent, coplanarly disposed cells and, in addition, is communicatively coupled to a corrresponding cell disposed in an overlying processing plane and to a corresponding cell disposed in an underlying processing plane. The control data processor is coupled to each of the cells within a given plane in a manner which provides for simultaneous communication with each of the cells within the plane. Each of the cells within a plane is provided with an output status signal operable for being combined with the output status signals from other cells within the plane to provide an input signal to the control data processor. The status signal may be expressive, when asserted, of a processing state common to all of the cells within the plane, thereby facilitating the operation of the control data processor in controlling a flow of data between adjacent processing planes, in initiating a desired processing sequence within a given plane, and in assuring the reception of data transmitted to the cells.
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